In recent years, development of high density packaging technology of a semiconductor integrated circuit has been promoted in accordance with requirements for high function and small-sizing of electronic apparatuses. There is a chip-on-chip type system in package in which another semiconductor chip is face-down mounted on a semiconductor chip as one of the packaging technology as stated above. The chip-on-chip structure as stated above is focused because it is effective for small-sizing, high-speed of operation, and power saving of the semiconductor package.
In the chip-on-chip type structure, a connection between the semiconductor chips is normally enabled by a flip-chip method via minute bumps. Besides, an underfill layer is formed by injecting a resin material between the semiconductor chips to protect a connection part from peripheral environment such as humidity and to secure mechanical strength.
However, in the conventional chip-on-chip type semiconductor device, peeling is easy to occur between a side surface of the semiconductor chip at an upper step and an underfill resin constituting the underfill layer when a temperature cycle of low-temperature and high-temperature is repeated. There is a case when a failure such that an internal wiring of the semiconductor chip at a lower step is cut because the peeling propagates inside the underfill resin as a crack.